1. Technical Field
The disclosure relates to a method for forming a semiconductor structure, and more particularly to a method for forming an opening in a dielectric layer.
2. Description of the Related Art
With the rapid reduction in dimensions of IC devices, the line pitch of interconnect is constantly decreasing. Because the RC delay effect gets more significant at reduced line pitch, SiO2 with a dielectric constant near 4.0 cannot be used as an IMD material in the interconnect structure. Therefore, low-k materials are widely used instead of SiO2 to reduce the parasitic capacitance, so as to inhibit the RC delay effect and the cross-talking effect and improve the operation speed. One of current low-k materials is a porous material having small voids or pores therein.